NDT3055L Datasheet | Fairchild Semiconductor

August 1998 NDT3055L N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These logic level N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance, and withstand high energy pulse in the avalanche and mutation modes. These devices are particularly suited for low voltage applications such as DC motor control and DC/DC conversion where fast switching, low in-line power loss, and resistance to transients are needed. Features 4 A, 60 V. RDS(ON) = 0.100 Ω @ VGS = 10 V, RDS(ON) = 0.120 Ω @ VGS = 4.5 V. Low drive requirements allowing operation directly from logic drivers. VGS(TH) < 2V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Super SOTTM-3 Super SOTTM-6 Super SOTTM-8 SO-8 SOT-223 SOIC-16 SOT-223 SOT-223-...