AN2701 Overview
Features of the TIM can include Two to six input capture/output pare channels Rising-edge, falling-edge or any-edge input capture trigger Set, clear or toggle output pare action Buffered and unbuffered pulse width modulation (PWM) signal generation Programmable TIM clock input Seven frequency internal bus clock prescaler selection External TIM clock input (4 MHz maximum frequency) Free-running or modulo up-count...
AN2701 Key Features
- Two to six input capture/output pare channels
- Rising-edge, falling-edge or any-edge input capture trigger
- Set, clear or toggle output pare action Buffered and unbuffered pulse width modulation (PWM) signal generation Programma
- Seven frequency internal bus clock prescaler selection
- External TIM clock input (4 MHz maximum frequency) Free-running or modulo up-count operation Toggle any channel pin on o
- Block Diagram Figure 1 shows the structure of the TIM, taken from an MC68HC908GZ60 (two channels represented out of the
AN2701 Applications
- Two to six input capture/output pare channels