DSP56852 Overview
four chip selects • One (1) Serial Port Interface (SPI) or one (1) Improved Synchronous Serial Interface (ISSI) • One (1) Serial munication Interface (SCI) • Interrupt Controller • General Purpose 16-bit Quad Timer • JTAG/Enhanced On-Chip Emulation (OnCE™) for unobtrusive, real-time debugging • puter Operating Properly (COP)/Watchdog Timer • 81-pin MAPBGA package • Up to 11 GPIO Memory Program Memory 6144 x 16 SRAM Boot ROM 1024 x 16 ROM Data Memory 4096 x 16 SRAM 6 OnCE VDDIO 6 VDD 3 VSSIO 6 VSS VDDA 3 VSSA 16-Bit 56800E Core Program Controller and
