MM912F634 Overview
Key Features
- 16-Bit S12 CPU, 32 kByte FLASH, 2.0 kByte RAM
- Background Debug (BDM) & Debug Module (DBG)
- Die to Die bus interface for transparent memory mapping
- On-chip oscillator & two independent watchdogs
- LIN 2.1 Physical Layer Interface with integrated SCI
- Six digital MCU GPIOs shared with SPI (PA5…0)
- 10-Bit, 15 Channel
- Analog to Digital Converter (ADC)
- 16-Bit, 4 Channel
- Timer Module (TIM16B4C)
