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MM912G634CV2AP - Integrated S12 Based Relay Driver

Download the MM912G634CV2AP datasheet PDF. This datasheet also covers the MM912_634 variant, as both devices belong to the same integrated s12 based relay driver family and are provided as variant models within a single manufacturer datasheet.

General Description

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11 Electrical Ch

Key Features

  • 16-Bit S12 CPU, 64/48 kByte P-FLASH,.
  • 6.0 kByte RAM; 4/2 kByte D-FLASH.
  • Background debug (BDM) & debug module (DBG).
  • Die to Die bus interface for transparent memory mapping.
  • On-chip oscillator & two independent watchdogs.
  • www. DataSheet4U. net LIN 2.1 Physical Layer Interface with integrated SCI.
  • 10 digital MCU GPIOs shared with SPI (PA7…0, PE1…0).
  • 10-Bit, 15 Channel - Analog to Digital Converter (ADC).
  • 16-Bit, 4 Chan.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MM912_634_FreescaleSemiconductor.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Freescale Semiconductor (now NXP Semiconductors)

Part Number Description
MM912G634CV1AE Integrated S12 Based Relay Driver
MM912G634CM1AE Integrated S12 Based Relay Driver
MM912F634 Integrated S12 Based Relay Driver
MM912H634CM1AE Integrated S12 Based Relay Driver
MM912H634CV1AE Integrated S12 Based Relay Driver

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Freescale Semiconductor Advance Information Document Number: MM912_634D1 Rev. 4.0, 5/2011 Integrated S12 Based Relay Driver with LIN The MM912G634 (48 kB) and MM912H634 (64 kB) are integrated single package solutions that integrates an HCS12 microcontroller with a SMARTMOS analog control IC. The Die to Die Interface (D2D) controlled analog die combines system base chip and application specific functions, including a LIN transceiver. Features • 16-Bit S12 CPU, 64/48 kByte P-FLASH, • 6.0 kByte RAM; 4/2 kByte D-FLASH • Background debug (BDM) & debug module (DBG) • Die to Die bus interface for transparent memory mapping • On-chip oscillator & two independent watchdogs •www.DataSheet4U.net LIN 2.