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MBM29DL800BA - 8M (1M X 8/512K X 16) BIT

Download the MBM29DL800BA datasheet PDF. This datasheet also covers the MBM29DL800TA variant, as both devices belong to the same 8m (1m x 8/512k x 16) bit family and are provided as variant models within a single manufacturer datasheet.

General Description

The MBM29DL800TA/BA are a 8M-bit, 3.0 V-only Flash memory organized as 1M bytes of 8 bits each or 512K words of 16 bits each.

The MBM29DL800TA/BA are offered in a 48-pin TSOP(I) and 48-ball FBGA packages.

Key Features

  • Single 3.0 V read, program, and erase Minimizes system level power requirements.
  • Simultaneous operations Read-while-Erase or Read-while-Program.
  • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs.
  • Compatible with JEDEC-standard world-wide pinouts (Pin compatible with MBM29LV800TA/BA) 48-pin TSOP(I) (Package suffix: PFTN.
  • Normal Bend Type, PFTR.
  • Reversed Bend Type) 48-ball FBGA (Package suffix: PBT).
  • Minim.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MBM29DL800TA_FujitsuMediaDevices.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
FUJITSU SEMICONDUCTOR DATA SHEET DS05-20860-3E FLASH MEMORY CMOS 8M (1M × 8/512K × 16) BIT MBM29DL800TA-70/-90/-12/MBM29DL800BA-70/-90/-12 s FEATURES • Single 3.0 V read, program, and erase Minimizes system level power requirements • Simultaneous operations Read-while-Erase or Read-while-Program • Compatible with JEDEC-standard commands Uses same software commands as E2PROMs • Compatible with JEDEC-standard world-wide pinouts (Pin compatible with MBM29LV800TA/BA) 48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) 48-ball FBGA (Package suffix: PBT) • Minimum 100,000 program/erase cycles • High performance 70 ns maximum access time • Sector erase architecture Two 16K byte, four 8K bytes, two 32K byte, and fourteen 64K bytes.