MBM29LV160B Datasheet Text
FUJITSU SEMICONDUCTOR DATA SHEET
DS05-20846-4E
FLASH MEMORY
CMOS
16M (2M × 8/1M × 16) BIT
MBM29LV160T-80/-90/-12/MBM29LV160B-80/-90/-12 s Features
- Single 3.0 V read, program and erase Minimizes system level power requirements
- patible with JEDEC-standard mands Uses same software mands as E2PROMs
- patible with JEDEC-standard world-wide pinouts 48-pin TSOP (I) (Package suffix: PFTN-Normal Bend Type, PFTR-Reversed Bend Type) 46-pin SON (Package suffix: PN) 48-pin CSOP (Package suffix: PCV) 48-ball FBGA (Package suffix: PBT)
- Minimum 100,000 program/erase cycles
- High performance 80 ns maximum access time
- Sector erase architecture One 8K word, two 4K words, one 16K word, and thirty-one 32K words sectors in word mode One 16K byte, two 8K bytes, one 32K byte, and thirty-one 64K bytes sectors in byte mode Any bination of sectors can be concurrently erased. Also supports full chip erase
- Boot Code Sector Architecture T = Top sector B = Bottom sector
- Embedded EraseTM Algorithms Automatically pre-programs and erases the chip or any sector
- Embedded programTM Algorithms Automatically programs and verifies data at specified address
- Data Polling and Toggle Bit feature for detection of program or erase cycle pletion
- Ready/Busy output (RY/BY) Hardware method for detection of program or erase cycle pletion
- Automatic sleep mode When addresses remain stable, automatically switches themselves to low power mode
- Low VCC write inhibit ≤ 2.5 V
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Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.
MBM29LV160T-80/-90/-12/MBM29LV160B-80/-90/-12
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- Erase Suspend/Resume Suspends the erase operation to allow a read data and/or program in another sector within the same device
- Sector protection...
