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GS8161E18DGT - 18Mb SyncBurst SRAMs

This page provides the datasheet information for the GS8161E18DGT, a member of the GS8161E18D 18Mb SyncBurst SRAMs family.

Description

Applications The GS8161E18D(GT/D)/GS8161E32D(D)/GS8161D36D(GT/D) is an 18,874,368-bit high performance synchronous SRAM with a 2-bit burst address counter.

Features

  • FT pin for user-configurable flow through or pipeline operation.
  • Dual Cycle Deselect (DCD) operation.
  • IEEE 1149.1 JTAG-compatible Boundary Scan.
  • 2.5 V or 3.3 V +10%/.
  • 10% core power supply.
  • 2.5 V or 3.3 V I/O supply.
  • LBO pin for Linear or Interleaved Burst mode.
  • Internal input resistors on mode pins allow floating mode pins.
  • Default to Interleaved Pipeline mode.
  • Byte Write (BW) and/or Global Write (GW) opera.

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Datasheet preview – GS8161E18DGT

Datasheet Details

Part number GS8161E18DGT
Manufacturer GSI Technology
File Size 1.19 MB
Description 18Mb SyncBurst SRAMs
Datasheet download datasheet GS8161E18DGT Datasheet
Additional preview pages of the GS8161E18DGT datasheet.

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Full PDF Text Transcription

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GS8161E18D(GT/D)/GS8161E32D(D)/GS8161E36D(GT/D) 100-Pin TQFP & 165-Bump BGA Commercial Temp Industrial Temp 1M x 18, 512K x 32, 512K x 36 18Mb SyncBurst SRAMs 400 MHz–150 MHz 2.5 V or 3.3 V VDD 2.5 V or 3.3 V I/O Features • FT pin for user-configurable flow through or pipeline operation • Dual Cycle Deselect (DCD) operation • IEEE 1149.1 JTAG-compatible Boundary Scan • 2.5 V or 3.3 V +10%/–10% core power supply • 2.5 V or 3.
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