• Part: GS8161E32D
  • Manufacturer: GSI Technology
  • Size: 1.19 MB
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GS8161E32D Key Features

  • FT pin for user-configurable flow through or pipeline operation
  • Dual Cycle Deselect (DCD) operation
  • IEEE 1149.1 JTAG-patible Boundary Scan
  • 2.5 V or 3.3 V +10%/-10% core power supply
  • 2.5 V or 3.3 V I/O supply
  • LBO pin for Linear or Interleaved Burst mode
  • Internal input resistors on mode pins allow floating mode pins
  • Default to Interleaved Pipeline mode
  • Byte Write (BW) and/or Global Write (GW) operation
  • Internal self-timed write cycle

Other GS8161E32D Datasheets

Manufacturer Part Number Description
GSI Logo GSI GS8161E32 (GS8161E18 - GS8161E36) Sync Burst SRAMs

GS8161E32D Description

Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synchronous SRAM applications, ranging from DSP main store to networking chip set support. Controls Addresses, data I/Os, chip enable (E1), address burst control inputs (ADSP, ADSC, ADV) and write control inputs (Bx, BW, GW) are synchronous and are controlled by a...