Datasheet Summary
GS8342T08/09/18/36BD-400/350/333/300/250
165-Bump BGA mercial Temp Industrial Temp
36Mb SigmaDDR-IITM Burst of 2 SRAM
400 MHz- 250 MHz 1.8 V VDD
1.8 V and 1.5 V I/O
Features
- Simultaneous Read and Write SigmaDDR™ Interface
- mon I/O bus
- JEDEC-standard pinout and package
- Double Data Rate interface
- Byte Write (x36, x18 and x9) and Nybble Write (x8) function
- Burst of 2 Read and Write
- 1.8 V +100/- 100 mV core power supply
- 1.5 V or 1.8 V HSTL Interface
- Pipelined read operation with self-timed Late Write
- Fully coherent read and write pipelines
- ZQ pin for programmable output drive strength
- IEEE 1149.1 JTAG-pliant Boundary Scan
- Pin-patible with present 9Mb,...