Datasheet Summary
GS8673ET18/36BK-675/625/550/500
260-Ball BGA mercial Temp Industrial Temp
72Mb SigmaDDR-IIIe™ Burst of 2 ECCRAM™
675 MHz- 500 MHz 1.35V VDD
1.2V to 1.5V VDDQ
Features
- On-Chip ECC with virtually zero SER
- Configurable Read Latency (3.0 or 2.0 cycles)
- Simultaneous Read and Write SigmaDDR-IIIe™ Interface
- mon I/O Bus
- Double Data Rate interface
- Burst of 2 Read and Write
- Pipelined read operation
- Fully coherent Read and Write pipelines
- 1.35V nominal VDD
- 1.2V JESD8-16A BIC-3 pliant Interface
- 1.5V HSTL Interface
- ZQ pin for programmable output drive impedance
- ZT for programmable input termination impedance
- Configurable Input Termination
- IEEE 1149.1...