Part GD25Q128C
Description 3.3V Uniform Sector Dual and Quad Serial Flash
Manufacturer GigaDevice
Size 1.02 MB
GigaDevice
GD25Q128C

Overview

GD25Q128C The GD25Q128C (128M-bit) Serial flash supports the standard Serial Peripheral Interface (SPI), and supports the Dual/Quad SPI: Serial Clock, Chip Select, Serial Data I/O0 (SI), I/O1 (SO), I/O2 (WP#),.

  • 128M-bit Serial Flash -16384K-byte -256 bytes per programmable page
  • Standard, Dual, Quad SPI -Standard SPI: SCLK, CS#, SI, SO, WP#, HOLD#/ RESET# -Dual SPI: SCLK, CS#, IO0, IO1, WP#, HOLD#/ RESET# -Quad SPI: SCLK, CS#, IO0, IO1, IO2, IO3 -QPI: SCLK, CS#, IO0, IO1, IO2, IO3
  • Program/Erase Speed -Page Program time: 0.6ms typical -Sector Erase time: 50ms typical -Block Erase time: 0.2/0.3s typical -Chip Erase time: 60s typical
  • Flexible Architecture -Sector of 4K-byte -Block of 32/64k-byte
  • High Speed Clock Frequency -104MHz for Standard and Dual SPI fast read with 30PF load -80MHz for Quad SPI and QPI fast read with 30PF load -Dual I/O Data transfer up to 208Mbits/s -Quad I/O Data transfer up to 320Mbits/s -QPI Mode Data transfer up to 320Mbits/s -Continuous Read With 8/16/32/64-byte Wrap
  • Low Power Consumption -20mA maximum active current -5uA maximum power down current
  • Advanced Security Features(1) -3*512-Byte Security Registers With OTP Locks -Discoverable parameters(SFDP) register
  • Software/Hardware Write Protection -Write protect all/portion of memory via software -Enable/Disable protection with WP# Pin -Top or Bottom, Sector or Block selection
  • Cycling endurance -Minimum 100,000 Program/Erase Cycles
  • Data retention -20-year data retention typical