HM628511H Datasheet | Hitachi Semiconductor

Description The HM628511H Series is a 4-Mbit high speed static RAM organized 512-k word × 8-bit. It has realized high speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell)and high speed circuit designing technology. It is most appropriate for the application which requires high speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. It is packaged in 400-mil 36-pin plastic SOJ. Features - Single 5.0 V supply : 5.0 V ± 10 % - Access time 10 /12 /15 ns (max) - pletely static memory  No clock or timing strobe required - Equal access and cycle times - Directly TTL patible  All inputs and outputs - Operating current : 180 / 160 / 140 m A (max) - TTL standby current : 70 / 60 / 50 m A (max) - CMOS standby current : 5 m A (max) : 1.2 m A (max) (L-version) - Data retension current: 0.8 m A (max) (L-version) - Data retension voltage: 2 V (min) (L-version) - Center VCC and VSS type pinout HM628511H Series Ordering Information Type No. HM628511HJP-10 HM628511HJP-12 HM628511HJP-15 HM628511HLJP-10 HM628511HLJP-12 HM628511HLJP-15 Access time 10 ns 12 ns 15 ns 10 ns 12 ns 15 ns Package 400-mil 36-pin plastic SOJ (CP-36D) Pin Arrangement HM628511HJP/HLJP Series A0 A1 A2 A3 A4 CS I/O1 I/O2 VCC VSS I/O3 I/O4 WE A5 A6 A7 A8 A9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 (Top View) 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 NC A18 A17 A16 A15 OE I/O8 I/O7 VSS VCC I/O6 I/O5 A14 A13 A12 A11 A10 NC HM628511H Series Pin Description Pin name A0 to A18 I/O1 to I/O8 CS OE WE VCC VSS NC Function Address input Data input/output Chip select Output enable Write enable Power supply Ground No connection Block Diagram (LSB) A1 A17 A7 A11 A16 A2 A6 A5 (MSB) Internal voltage generater Row decoder Memory matrix 256 rows × 8 columns × 256 blocks × 8 bit (4,194,304 bits) VCC VSS CS I/O1 . . . I/O8 Column I/O Input data control Column decoder CS WE CS A10 A8 A9 A12 A13 A14 A0 A18 A15 A3 A4 (LSB)...