HM658512A - 4 M PSRAM (512-kword x 8-bit) 2 k Refresh

Product Overview

Hitachi Semiconductor

Part number	HM658512A
Manufacturer	Hitachi Semiconductor
File Size	105.19 KB
Description	4 M PSRAM (512-kword x 8-bit) 2 k Refresh
Datasheet	HM658512A Datasheet
Additional preview pages of the HM658512A datasheet.

The Hitachi HM658512A is a CMOS pseudo static RAM organized 512-kword × 8-bit.

It realizes higher density, higher performance and low power consumption by employing 0.8 µm Hi-CMOS process technology.

It offers low power data retention by self refresh mode.

Single 5 V (±10%).
High speed  Access time CE access time: 70/80/100 ns (max)  Cycle time Random read/write cycle time: 115/130/160 ns (min).
Low power  Active: 250 mW (typ)  Standby: 200 µW (typ).
Directly TTL compatible All inputs and outputs.
Simple address configuration Non multiplexed address.
Refresh cycle  2048 refresh cycles: 32 ms HM658512A Series.
Easy refresh functions Address refresh Automatic refresh Self refresh.

Other Datasheets by Hitachi Semiconductor

Published: Mar 26, 2005 |