HM658512A Datasheet | Hitachi Semiconductor

Description The Hitachi HM658512A is a CMOS pseudo static RAM organized 512-kword × 8-bit. It realizes higher density, higher performance and low power consumption by employing 0.8 µm Hi-CMOS process technology. It offers low power data retention by self refresh mode. It also offers easy non multiplexed address interface and easy refresh functions. HM658512A is suitable for handy systems which work with battery back-up systems. The device is packaged in a small 525-mil SOP (460-mil body SOP) or a 8 × 20 mm TSOP with thickness of 1.2 mm, or a 600-mil plastic DIP. High density custom cards made of Tape Carrier Packages are also available. Features - Single 5 V (±10%) - High speed  Access time CE access time: 70/80/100 ns (max)  Cycle time Random read/write cycle time: 115/130/160 ns (min) - Low power  Active: 250 m W (typ)  Standby: 200 µW (typ) - Directly TTL patible All inputs and outputs - Simple address configuration Non multiplexed address - Refresh cycle  2048 refresh cycles: 32 ms HM658512A Series - Easy refresh functions Address refresh Automatic refresh Self refresh Ordering Information Type No. HM658512ALP-7 HM658512ALP-8 HM658512ALP-10 HM658512ALP-7V HM658512ALP-8V HM658512ALP-10V HM658512ALFP-7 HM658512ALFP-8 HM658512ALFP-10 HM658512ALFP-7V HM658512ALFP-8V HM658512ALFP-10V HM658512ALTT-7 HM658512ALTT-8 HM658512ALTT-10 HM658512ALTT-7V HM658512ALTT-8V HM658512ALTT-10V HM658512ALRR-7 HM658512ALRR-8 HM658512ALRR-10 HM658512ALRR-7V HM658512ALRR-8V HM658512ALRR-10V Access time 70 ns 80 ns 100 ns 70 ns 80 ns 100 ns 70 ns 80 ns 100 ns 70 ns 80 ns 100 ns 70 ns 80 ns 100 ns 70 ns 80 ns 100 ns 70 ns 80 ns 100 ns 70 ns 80 ns 100 ns 400-mil 32-pin plastic TSOP (TTP-32DR) 400-mil 32-pin plastic TSOP (TTP-32D) 525-mil 32-pin plastic SOP (FP-32D) Package 600-mil 32-pin plastic DIP (DP-32) HM658512A Series Pin Arrangement HM658512ALP/ALFP Series A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top view)...