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HM658512A Datasheet

4 M Psram (512-kword X 8-bit) 2 K Refresh

Manufacturer: Hitachi Semiconductor (now Renesas)

HM658512A Overview

The Hitachi HM658512A is a CMOS pseudo static RAM organized 512-kword × 8-bit. It realizes higher density, higher performance and low power consumption by employing 0.8 µm Hi-CMOS process technology. It offers low power data retention by self refresh mode.

HM658512A Key Features

  • Single 5 V (±10%)
  • High speed  Access time CE access time: 70/80/100 ns (max)  Cycle time Random read/write cycle time: 115/130/160 ns (m
  • Low power  Active: 250 mW (typ)  Standby: 200 µW (typ)
  • Directly TTL patible All inputs and outputs
  • Simple address configuration Non multiplexed address
  • Refresh cycle  2048 refresh cycles: 32 ms
  • Easy refresh functions Address refresh Automatic refresh Self refresh

HM658512A Distributor