Hitachi HD74ALVCH16836
This 20-bit universal bus driver is designed for 2.3 V to 3.6 V VCC operation. The device operates in the transparent mode when the latch enable (LE) input is low.DESCRIPTION
Data flow from A to Y is controlled by the output enable (O E) input. The A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is high, the A data is stored in the latch flip flop on the low to high transition of CLK. When OE is high, the outputs are in the high impedance state. To ensure the high impedance state during power up or power down, OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the driver. Active bus hold circuitry is provided to hold unused or floating inputs at a valid logic level.FEATURES
● VCC = 2.3 V to 3.6 V● Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
● Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
● High output current ±24 mA (@VCC = 3.0 V)
● Bus hold on data inputs eliminates the need for external pullup / pulldown resistors HD74ALVCH16836 Function Table Inputs OE H L L L L L L LE X L L H H H H CLK X X...