SH7709S
Overview
- Original Hitachi SuperH architecture
- Object code level compatible with SH-1, SH-2 and SH-3 (SH7708)
- 32-bit internal data bus
- General-register files Sixteen 32-bit general registers (eight 32-bit shadow registers) Eight 32-bit control registers Four 32-bit system registers
- RISC-type instruction set Instruction length: 16-bit fixed length for improved code efficiency Load-store architecture Delayed branch instructions Instruction set based on C language
