HM6216255H Datasheet | Hitachi Semiconductor

Description The HM6216255H Series is a 4-Mbit high speed static RAM organized 256-k word × 16-bit. It has realized high speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell) and high speed circuit designing technology. It is most appropriate for the application which requires high speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. It is packaged in 400-mil 44-pin plastic SOJ and 400-mil 44-pin plastic TSOPII. Features - Single 5.0 Vsupply : 5.0 V ± 10 % - Access time: 10/12/15 ns (max) - pletely static memory  No clock or timing strobe required - Equal access and cycle times - Directly TTL patible  All inputs and outputs - Operating current: 200/180/160 m A (max) - TTL standby current: 70/60/50 m A (max) - CMOS standby current: 5 m A (max) : 1.2 m A (max) (L-version) - Data retansion current: 0.8 m A (max) (L-version) - Data retantion voltage: 2 V (min) (L-version) - Center VCC and VSS type pinout HM6216255H Series Ordering Information Type No. HM6216255HJP-10 HM6216255HJP-12 HM6216255HJP-15 HM6216255HLJP-10 HM6216255HLJP-12 HM6216255HLJP-15 HM6216255HTT-10 HM6216255HTT-12 HM6216255HTT-15 HM6216255HLTT-10 HM6216255HLTT-12 HM6216255HLTT-15 Access time 10 ns 12 ns 15 ns 10 ns 12 ns 15 ns 10 ns 12 ns 15 ns 10 ns 12 ns 15 ns 400-mil 44-pin plastic TSOPII (TTP-44DE) Package 400-mil 44-pin plastic SOJ (CP-44D) Pin Arrangement HM6216255HJP/HLJP Series A0 A1 A2 A3 A4 CS I/O1 I/O2 I/O3 I/O4 VCC VSS I/O5 I/O6 I/O7 I/O8 WE A5 A6 A7 A8 A9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A17 A16 A15 OE UB LB I/O16 I/O15 I/O14 I/O13 VSS VCC I/O12 I/O11 I/O10 I/O9 NC A14 A13 A12 A11 A10 HM6216255HTT/HLTT Series A0 A1 A2 A3 A4 CS I/O1 I/O2 I/O3 I/O4 VCC VSS I/O5 I/O6 I/O7 I/O8 WE A5 A6 A7 A8 A9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A17...