HM628512CI Datasheet | Hitachi Semiconductor

Description The Hitachi HM628512CI is a 4-Mbit static RAM organized 512-kword × 8-bit. HM628512CI Series has realized higher density, higher performance and low power consumption by employing Hi-CMOS process technology. The HM628512CI Series offers low power standby power dissipation; therefore, it is suitable for battery backup systems. It has packaged in 32-pin SOP, 32-pin TSOP II and 32-pin DIP. Features - Single 5 V supply - Access time: 70 ns (max) - Power dissipation  Active: 50 m W/MHz (typ)  Standby: 10 µW (typ) - pletely static memory. No clock or timing strobe required - Equal access and cycle times - mon data input and output: Three state output - Directly TTL patible: All inputs and outputs - Battery backup operation - Operating temperature: - 40 to +85˚C Preliminary: The specification of this device are subject to change without notice. Please contact your nearest Hitachi’s Sales Dept. regarding specification. HM628512CI Series Ordering Information Type No. HM628512CLPI-7 HM628512CLFPI-7 HM628512CLTTI-7 HM628512CLRRI-7 Access time 70 ns 70 ns 70 ns 70 ns Package 600-mil 32-pin plastic DIP (DP-32) 525-mil 32-pin plastic SOP (FP-32D) 400-mil 32-pin plastic TSOP II (TTP-32D) 400-mil 32-pin plastic TSOP II reverse (TTP-32DR) HM628512CI Series Pin Arrangement 32-pin DIP 32-pin SOP A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top view) 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A15 A17 WE A13 A8 A9 A11 OE A10 CS I/O7 I/O6 I/O5 I/O4 I/O3 A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top view) 32-pin TSOP 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A15 A17 WE A13 A8 A9 A11 OE A10 CS I/O7 I/O6 I/O5 I/O4 I/O3 32-pin TSOP (reverse) VCC A15 A17 WE A13 A8 A9 A11 OE A10 CS I/O7 I/O6 I/O5 I/O4 I/O3 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 (Top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0...