HM628512C Description
The Hitachi HM628512C is a 4-Mbit static RAM organized 512-kword × 8-bit. It realizes higher density, higher performance and low power consumption by employing Hi-CMOS process technology. The device, packaged in a 525-mil SOP (foot print pitch width) or 400-mil TSOP TYPE II or 600-mil plastic DIP, is available for high density mounting.
HM628512C Key Features
- Single 5 V supply
- Access time: 55/70 ns (max)
- Power dissipation Active: 50 mW/MHz (typ) Standby: 10 µW (typ)
- pletely static memory. No clock or timing strobe required
- Equal access and cycle times
- mon data input and output: Three state output
- Directly TTL patible: All inputs and outputs
- Battery backup operation
- CS WE OE Timing Pulse Generator Read/Write Control