GM71VS65803AL
GM71VS65803AL is 8M x 8-Bit CMOS DRAM manufactured by SK Hynix.
Description
The GM71V(S)65803A/AL is the new generation dynamic RAM organized 8,388,608 words by 8bits. The GM71V(S)65803A/AL utilizes advanced CMOS Silicon Gate Process Technology as well as advanced circuit techniques for wide operating margins, both internally and to the system user. System oriented features include single power supply of 3.3V+/-10% tolerance, direct interfacing capability with high performance logic families such as Schottky TTL. The GM71V(S)65803A/AL offers Extended Data Out (EDO) Mode as a high speed access mode.
Pin Configuration 32 SOJ / TSOP II
VCC IO0 IO1 IO2 IO3 NC VCC /WE /RAS A0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VSS IO7 IO6 IO5 IO4 VSS /CAS /OE NC A11 A10 A9 A8 A7 A6 VSS
Features
- 8,388,608 Words x 8 Bit
- Extended Data Out (EDO) Mode Capability
- Fast Access Time & Cycle Time (Unit: ns)
A1 A2 A3 A4 A5 VCC t RAC
GM71V(S)65803A/AL-5 GM71V(S)65803A/AL-6 50 60 t AA
25 30 t CAC
13 15 t RC
84 104 t HPC
20 25 w w w
. t a d h s a
- Power dissipation
- Active : 702m W/630m W(MAX)
- Standby : 1.8 m W ( CMOS level : MAX ) 0.54m W ( L-Version : MAX)
- EDO page mode capability
- Access time : 50ns/60ns (max)
- Refresh cycles
- RAS only Refresh 4096 cycles/64
- Â (GM71V65803A) 4096 cycles/128- Â (GM71VS65803AL)(L_Version)
- CBR & Hidden Refresh 4096 cycles/64
- Â (GM71V65803A) 4096 cycles/128
- Â (GM71VS65803AL)( L-Version )
- 4 variations of refresh -RAS-only refresh -CAS-before-RAS refresh -Hidden refresh -Self refresh (L-Version)
- Single Power Supply of 3.3V+/-10 % with a built-in VBB generator
- Battery Back Up Operation ( L-Version )
(Top View) t e e
. u 4 m o c
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LG Semicon
Pin Description
Pin A0-A11 A0-A11 RAS CAS OE Function Address Inputs Refresh Address Inputs Row Address Strobe Column Address Strobe Output Enable Pin WE I/O0
- I/O7 VCC VSS NC
GM71V(S)65803A/AL
Function Write Enable Data Input / Output Power (+3.3V) Ground No Connection
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