H5AN4G6NMFR-xxC Overview
The H5AN4G8NMFR-xxC and H5AN4G6NMFR-xxC are a 4Gb CMOS Double Data Rate IV (DDR4) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. SK hynix 4Gb DDR4 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges...
H5AN4G6NMFR-xxC Key Features
- VDD=VDDQ=1.2V +/- 0.06V
- Fully differential clock inputs (CK, CK) operation
- Differential Data Strobe (DQS, DQS)
- On chip DLL align DQ, DQS and DQS transition with CK transition
- DM masks write data-in at the both rising and falling edges of the data strobe
- All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock
- Programmable additive latency 0, CL-1, and CL-2 supported (x4/x8/x16)
- Programmable burst length 4/8 with both nibble sequential and interleave mode
- BL switch on the fly
- 16banks