HY57V28820HLT-L - (HY57V28820HC(L)T-L) 4Banks x 4M x 8bits Synchronous DRAM

This page provides the datasheet information for the HY57V28820HLT-L, a member of the HY57V28820HCT (HY57V28820HC(L)T-L) 4Banks x 4M x 8bits Synchronous DRAM family.

Product Overview

Hynix Semiconductor

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Datasheet Details

Part number	HY57V28820HLT-L
Manufacturer	Hynix Semiconductor
File Size	382.57 KB
Description	(HY57V28820HC(L)T-L) 4Banks x 4M x 8bits Synchronous DRAM
Datasheet	HY57V28820HLT-L Datasheet
Additional preview pages of the HY57V28820HLT-L datasheet.

HY57V28820HLT-L Product details

Description

The Hynix HY57V28820HC(L)T is a 134,217,728bit CMOS Synchronous DRAM, ideally suited for the Mobile applications which require low power consumption and extended temperature range.

f HY57V28820HC(L)T is organized as 4banks of 4,194,304x8.

Features

Single 3.3±0.3V power supply All device pins are compatible with LVTTL interface JEDEC standard 400mil 54pin TSOP-II with 0.8mm of pin pitch All inputs and outputs referenced to positive edge of system clock Data mask function by DQM Internal four banks operation.
Auto refresh and self refresh 4096 refresh cycles / 64ms Programmable Burst Length and Burst Type - 1, 2, 4, 8 or Full Page for Sequential Burst.
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Published: Oct 9, 2006 |