HY5DU56422LTP - (HY5DU56x22DTP) 256M DDR SDRAM

This page provides the datasheet information for the HY5DU56422LTP, a member of the HY5DU56422DTP (HY5DU56x22DTP) 256M DDR SDRAM family.

Product Overview

Hynix Semiconductor

Part number	HY5DU56422LTP
Manufacturer	Hynix Semiconductor
File Size	450.52 KB
Description	(HY5DU56x22DTP) 256M DDR SDRAM
Datasheet	HY5DU56422LTP Datasheet
Additional preview pages of the HY5DU56422LTP datasheet.

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VDD, VDDQ = 2.5V +/- 0.2V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS) x16 device has two bytewide data strobes (UDQS, LDQS) per each x8 I/O Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers when write (centered DQ) On chip DLL ali.

Other Datasheets by Hynix Semiconductor

HY5DU56422LT - (HY5DU56xx22A(L)T) 256M-S DDR SDRAM
HY5DU56422LT - (HY5DU56xx22DT) 256Mb DDR SDRAM
HY5DU56422AT - (HY5DU56xx22A(L)T) 256M-S DDR SDRAM
HY5DU56422BT-D4 - (HY5DU56x22BT-D4x) 256M-P DDR SDRAM
HY5DU56422BT-D43 - (HY5DU56x22BT-D4x) 256M-P DDR SDRAM
HY5DU56422CF - (HY5DU56xxxC(L)F) 256M DDR SDRAM
HY5DU56422CT - (HY5DU56xx22CT) 256M-P DDR SDRAM
HY5DU56422DT - (HY5DU56xx22DT) 256Mb DDR SDRAM

Published: Nov 7, 2006 |