HY5S6B6 - (HY5S6B6D/L/S/F/P) 4Banks x 1M x 16-Bits SDRAM

This page provides the datasheet information for the HY5S6B6, a member of the HY5S6B6D (HY5S6B6D/L/S/F/P) 4Banks x 1M x 16-Bits SDRAM family.

Product Overview

Hynix Semiconductor

Part number	HY5S6B6
Manufacturer	Hynix Semiconductor
File Size	386.10 KB
Description	(HY5S6B6D/L/S/F/P) 4Banks x 1M x 16-Bits SDRAM
Datasheet	HY5S6B6 Datasheet
Additional preview pages of the HY5S6B6 datasheet.

and is subject to change without notice.

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Standard SDRAM Protocol Internal 4bank operation.
Power Supply Voltage : VDD = 1.8V, VDDQ = 1.8V LVCMOS compatible I/O Interface Low Voltage interface to reduce I/O power Low Power Features - PASR(Partial Array Self Refresh) - AUTO TCSR (Temperature Compensated Self Refresh) - DS (Drive Strength) - Deep Power Down Mode Programmable CAS latency of 1, 2 or 3 Package Type : 54ball, 0.8mm pitch FBGA (Lead Free, Lead) HY5S6B6D(L/S)FP : Lead Free HY5S6B6D(L/S)F : Lead.

Other Datasheets by Hynix Semiconductor

Published: Jan 13, 2006 |