HY62256AJ-I Datasheet | SK Hynix

Description Features The Fully static operation and HY62256A/HY62256A-I Tri-state outputs is a high-speed, low TTL patible inputs power and 32,786 x 8-bits and outputs CMOS Static Random Low power consumption Access Memory -2.0V(min.) data fabricated using retention Hyundai's high Standard pin performance CMOS configuration process technology. The -28 pin 600 mil PDIP HY62256A/HY62256A-I -28 pin 330 mil SOP has a data retention mode -28 pin 8x13.4 mm that guarantees data to TSOP-1 remain valid at the (standard and reversed) minimum power supply voltage of 2.0 volt. Using the CMOS technology, supply voltages from 2.0 to 5.5 volt has little effect on supply current in the data retention mode. The HY62256A/HY62256A-I is suitable for use in low voltage operation and battery back-up application. - - - - 1 of 2 22/10/97 12:30 Data Sheet-sram/62256ald1 http://.hea./hean2/sram/62256ald1.htm Voltage Speed Product No. (V) (ns) HY62256A 5.0 Standby Operation Current(u A) Temperature Current(m A) (°C) L LL 1m A 100 25 0-70(Normal) 1m A 100 -40-85(E.T.) 55/70/85 50 55/70/85 50 HY62256A-I 5.0 Note 1. E T. Extended Temperature, Normal: Normal Temperature 2. Current value is max. Features | Pins | Ratings | Timing | Package | Ordering 3101 North First Street, San Jose, CA 95134 Phone: 408-232-8000 URL: http://.hea./ SRAM Data Sheets | Memory Products | email: DRAMSRAMmemory@hea. Copyright © 1997 Hyundai Electronics America. 2 of 2 22/10/97 12:30 -sram/62256alp1 http://.hea./hean2/sram/62256alp1.htm HYUNDAI ELECTRONICS AMERICA HY62256A-(I) Series 32Kx8bit CMOS SRAM PIN CONNECTION PIN INFORMATION BLOCK DIAGRAM PIN DESCRIPTION Pin Name /CS /WE /OE A0-A14 I/O1-I/O8 Vcc Vss Chip Select Write Enable Output Enable Address Inputs Data Input/Output Power(+5.0V) Ground Features | Pins | Ratings | Timing | Package | Ordering 1 of 2 Pin Function 3101 North First Street, San Jose, CA 95134 22/10/97 12:32 -sram/62256alp1 http://.hea./hean2/sram/62256alp1.htm Phone:...