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HYMP164S64CP6 - 1200pin Unbuffered DDR2 SDRAM SO-DIMMs

Download the HYMP164S64CP6 datasheet PDF. This datasheet also covers the HYMP112S64CP6 variant, as both devices belong to the same 1200pin unbuffered ddr2 sdram so-dimms family and are provided as variant models within a single manufacturer datasheet.

General Description

and is subject to change without notice.

Hynix Semiconductor does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Key Features

  • JEDEC standard Double Data Rate 2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply.
  • All inputs and outputs are compatible with SSTL_1.8 interface.
  • Posted CAS Programmable CAS Latency 3 ,4 ,5, and 6 OCD (Off-Chip Driver Impedance Adjustment) and ODT (On-Die Termination).
  • Fully differential clock operations (CK & CK).
  • Programmable Burst Length 4 / 8 with both sequential and inte.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HYMP112S64CP6_HynixSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number HYMP164S64CP6
Manufacturer SK Hynix
File Size 557.48 KB
Description 1200pin Unbuffered DDR2 SDRAM SO-DIMMs
Datasheet download datasheet HYMP164S64CP6 Datasheet

Full PDF Text Transcription for HYMP164S64CP6 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for HYMP164S64CP6. For precise diagrams, and layout, please refer to the original PDF.

www.DataSheet4U.com 200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 1Gb version C This Hynix unbuffered Small Outline Dual In-Line Memory Module(DIMM) series consists of 1...

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ed Small Outline Dual In-Line Memory Module(DIMM) series consists of 1Gb version C DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 200pin glass-epoxy substrate. This Hynix 1Gb version C based Unbuffered DDR2 SO-DIMM series provide a high performance 8 byte interface in 67.60mm width form factor of industry standard. It is suitable for easy interchange and addition. FEATURES • JEDEC standard Double Data Rate 2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply • All inputs and outputs are compatible with SSTL_1.