ICS543 - PRELIMINARY INFORMATION Clock Divider and 2X Multiplier

Product Overview

ICST

Datasheet Details

Part number	ICS543
Manufacturer	ICST
File Size	78.55 KB
Description	PRELIMINARY INFORMATION Clock Divider and 2X Multiplier
Datasheet	ICS543 Datasheet
Additional preview pages of the ICS543 datasheet.

Product details

Description

The ICS543 is a cost effective way to produce a high quality clock output divided from a clock input.

The chip accepts a clock input up to 90 MHz at 5.0 V, and by using proprietary Phase Locked Loop (PLL) techniques, produces a divide by 3, 5, 6, or 10, or a multiply by 2 of the input clock.

Features

Packaged in 8 pin SOIC.
Low cost clock divider and 2X multiplier.
Low skew (500ps) outputs. One is ÷ 2 of other.
Easy to use with other generators and buffers.
Input clock frequency up to 90 MHz at 5 V.
Output clock duty cycle of 45/55.
Power Down turns off chip.
Output Enable.
Full CMOS clock swings with 25 mA drive capability at TTL levels.
Advanced, low power CMOS process.
Operating voltages o.

📁 Similar Datasheet

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ICS548A-03 - LOW SKEW CLOCK INVERTER AND DIVIDER (Renesas)
ICS501 - PLL CLOCK MULTIPLIER (IDT)
ICS501 - PLL CLOCK MULTIPLIER (Renesas)

Other Datasheets by ICST

ICS541 - PRELIMINARY INFORMATION PLL Clock Divider
ICS542 - Clock Divider
ICS548-03 - Low Skew Clock Inverter and Divider
ICS548-05A - MP3 Audio Clock
ICS552-01A - Crystal Oscillator & Multiplier
ICS552-02 - LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER

Published: Feb 7, 2007 |