9DBL0442 - 4-Output 3.3V PCIe Zero-delay Buffer

IDT

General Description

The 9DBL0442 / 9DBL0452 devices are 3.3V members of IDT's Full-Featured PCIe family.

The 9DBL0442 / 9DBL0452 supports PCIe Gen1-4 Common Clocked (CC) and PCIe Separate Reference Independent Spread (SRIS) systems.

Key Features

4.
1-200 MHz Low-Power (LP) HCSL DIF pairs.
9DBL0442 default ZOUT = 100.
9DBL0452 default ZOUT = 85.
9DBL04P2 factory programmable defaults.
Easy AC-coupling to other logic families, see IDT.

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9DBL0442 4-output 3.3v pcie zero-delay buffer by IDT - Datasheet Preview

Datasheet Details

Part number	9DBL0442
Manufacturer	IDT
File Size	298.38 KB
Description	4-Output 3.3V PCIe Zero-delay Buffer
Datasheet	9DBL0442 Datasheet

📁 Similar Datasheet

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9DBL0442	Zero-Delay/Fanout Buffer	Renesas
9DBL0442C	2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers	Renesas
9DBL0452	3.3V PCIe Zero Delay Buffer	Renesas
9DBL0452	Zero-Delay/Fanout Buffer	Renesas

Other Datasheets by IDT

Part Number	Description
9DBL0443	4-output 3.3V LP-HCSL Zero-Delay Buffer
9DBL04	4-output 3.3V PCIe Zero-delay Buffer
9DBL0452	4-Output 3.3V PCIe Zero-delay Buffer
9DBL0453	4-output 3.3V LP-HCSL Zero-Delay Buffer
9DBL0455	PCIe Gen1-5 Clock Fanout Buffers

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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4-Output 3.3V PCIe Zero-delay Buffer 9DBL0442 / 9DBL0452 DATASHEET Description The 9DBL0442 / 9DBL0452 devices are 3.3V members of IDT's Full-Featured PCIe family. The 9DBL0442 / 9DBL0452 supports PCIe Gen1-4 Common Clocked (CC) and PCIe Separate Reference Independent Spread (SRIS) systems. It offers a choice of integrated output terminations providing direct connection to 85 or 100 transmission lines. The 9DBL04P2 can be factory programmed with a user-defined power up default SMBus configuration.