ICS571 - LOW PHASE NOISE ZERO DELAY BUFFER

Product Overview

IDT

ICS571 LOW PHASE NOISE ZERO DELAY BUFFER by IDT - Datasheet Preview — Datasheet preview – ICS571

Datasheet Details

Part number	ICS571
Manufacturer	IDT
File Size	136.08 KB
Description	LOW PHASE NOISE ZERO DELAY BUFFER
Datasheet	ICS571 Datasheet
Additional preview pages of the ICS571 datasheet.

Product details

Description

The ICS571 is a high speed, high output drive, low phase noise Zero Delay Buffer (ZDB) which integrates IDT’s proprietary analog/digital Phase Locked Loop (PLL) techniques.

Features

Packaged in 8-pin SOIC (Pb free).
Can function as low phase noise x2 multiplier.
Low skew outputs. One is ÷2 of other.
Input clock frequency up to 160 MHz at 3.3 V.
Phase noise of better than -100 dBc/Hz from 1 kHz to 1 MHz offset from carrier.
Can recover poor input clock duty cycle.
Output clock duty cycle of 45/55 at 3.3 V.
High drive strength for >100 MHz outputs.
Full CMOS clock swings with 25 mA drive capabil.

📁 Similar Datasheet

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Other Datasheets by IDT

ICS570 - MULTIPLIER AND ZERO DELAY BUFFER
ICS574 - LOW SKEW BUFFER
ICS501 - PLL CLOCK MULTIPLIER
ICS501A - PLL CLOCK MULTIPLIER
ICS511 - PLL CLOCK MULTIPLIER
ICS512 - PLL CLOCK MULTIPLIER

Published: Apr 5, 2019 |