ICS570A Description
The ICS570A is a high performance Zero Delay Buffer (ZDB) which integrates ICS’ proprietary analog/digital Phase Locked Loop (PLL) techniques. ICS introduced the world standard for these devices in 1992 with the debut of the AV9170. The ICS570A, part of ICS’ ClockBlocks™ family, was designed as a performance upgrade to meet today’s higher speed and lower voltage requirements.
ICS570A Key Features
- Packaged in 8 pin SOIC
- Pin-for-pin replacement and upgrade to ICS570
- Functional equivalent to AV9170 (not a pinfor-pin replacement)
- Low input to output skew of 500 ps max
- Low skew (250 ps) outputs. One is ÷ 2 of other
- Ability to choose between 14 different multipliers from 0.5X to 32X
- Input clock frequency up to 150 MHz at 3.3V
- Can recover poor input clock duty cycle
- Output clock duty cycle of 45/55
- Power Down and Tri-State Mode