IDT71V25761 Overview
The IDT71V25761/781 are high-speed SRAMs organized as 128K x 36/256K x 18. The IDT71V25761/781 SRAMs contain write, data, address and control registers. Internal logic allows the SRAM to generate a self-timed write based upon a decision which can be left until the end of the write cycle.
IDT71V25761 Key Features
- 200MHz 3.1ns clock access time mercial and Industrial
- 183MHz 3.3ns clock access time
- 166MHz 3.5ns clock access time LBO input selects interleaved or linear burst mode Self-timed write cycle with global wri