IDT71V35761SA Description
128K x 36 3.3V Synchronous SRAMs IDT71V35761S/SA 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect.
IDT71V35761SA Key Features
- 128K x 36 memory configurations
- Supports high system speed
- 200MHz 3.1ns clock access time mercial and Industrial
- 183MHz 3.3ns clock access time
- 166MHz 3.5ns clock access time
- LBO input selects interleaved or linear burst mode
- 3.3V core power supply
- Self-timed write cycle with global write control (GW), byte write enable (BWE), and byte writes (BWx)
- Power down controlled by ZZ input
- 3.3V I/O