Datasheet Details
| Part number | IDT71V35761S |
|---|---|
| Manufacturer | Renesas |
| File Size | 1.16 MB |
| Description | 128K x 36 3.3V Synchronous SRAM |
| Datasheet |
 IDT71V35761S Datasheet
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General Description
The IDT71V35761 are high-speed SRAMs organized as 128K x 36.
The IDT71V35761 SRAMs contain write, data, address and controlregisters.
InternallogicallowstheSRAMtogenerateaself-timed write based upon a decision which can be left until the end of the write cycle.
Key Features
- 128K x 36 memory configurations.
- Supports high system speed: Commercial:.
- 200MHz 3.1ns clock access time Commercial and Industrial:.
- 183MHz 3.3ns clock access time.
- 166MHz 3.5ns clock access time.
- LBO input selects interleaved or linear burst mode.
- 3.3V core power supply Functional Block Diagram LBO ADV CLK ADSC ADSP.
- Self-timed write cycle with global write control (GW), byte write enable (BWE), and byte writes (BWx).
- Power down control.