IDT71V35761S
IDT71V35761S is 128K x 36 3.3V Synchronous SRAM manufactured by Renesas.
128K x 36 3.3V Synchronous SRAMs
IDT71V35761S/SA
3.3V I/O, Pipelined Outputs
Burst Counter, Single Cycle Deselect
Features
- 128K x 36 memory configurations
- Supports high system speed: mercial:
- 200MHz 3.1ns clock access time mercial and Industrial:
- 183MHz 3.3ns clock access time
- 166MHz 3.5ns clock access time
- LBO input selects interleaved or linear burst mode
- 3.3V core power supply
Functional Block Diagram
LBO ADV
CLK ADSC
ADSP
- Self-timed write cycle with global write control (GW), byte write enable (BWE), and byte writes (BWx)
- Power down controlled by ZZ input
- 3.3V I/O
- Optional
- Boundary Scan JTAG Interface (IEEE 1149.1 pliant)
- Packaged in a JEDEC Standard 100-pin plastic thin quad flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch ball grid array
- Green parts available, see ordering information
Binary Counter CLR
Burst Sequence
Burst Logic
Q0
Q1
A0- A1-
INTERNAL...
