IDT71V546S - 3.3V Synchronous SRAM

Product Overview

IDT

Part number	IDT71V546S
Manufacturer	IDT
File Size	249.52 KB
Description	3.3V Synchronous SRAM
Datasheet	IDT71V546S Datasheet
Additional preview pages of the IDT71V546S datasheet.

128K x 36 memory configuration, pipelined outputs.
Supports high performance system speed - 133 MHz (4.2 ns Clock-to-Data Access).
ZBTTM Feature - No dead cycles between write and read cycles.
Internally synchronized registered outputs eliminate the need to control OE.
Single R/W (READ/WRITE) control pin Functional Block Diagram LBO Address A [0:16] CE1, CE2, CE2 R/W CEN ADV/LD BWx DQ DQ.
Positive clock-edge triggered address, data, and control signal registers.

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Published: Apr 7, 2019 |