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IDT71V67603Z - 3.3V Synchronous SRAMs

This page provides the datasheet information for the IDT71V67603Z, a member of the IDT71V67603 3.3V Synchronous SRAMs family.

Datasheet Summary

Description

256K x 36/512K x 18.

The IDT71V67603/7803 SRAMs contain write, data, address and control registers.

Features

  • 256K x 36, 512K x 18 memory configurations.
  • Supports high system speed:.
  • 166MHz 3.5ns clock access time.
  • 150MHz 3.8ns clock access time.
  • 133MHz 4.2ns clock access time.
  • LBO input selects interleaved or linear burst mode.
  • Self-timed write cycle with global write control (GW), byte write enable (BWE), and byte writes (BWx).
  • 3.3V core power supply.
  • Power down controlled by ZZ input.
  • 3.3V I/O supply (VDDQ).
  • Packaged in a JEDEC Stand.

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Datasheet preview – IDT71V67603Z

Datasheet Details

Part number IDT71V67603Z
Manufacturer IDT
File Size 241.61 KB
Description 3.3V Synchronous SRAMs
Datasheet download datasheet IDT71V67603Z Datasheet
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Full PDF Text Transcription

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256K X 36, 512K X 18 3.3V Synchronous SRAMs 3.3V I/O, Burst Counter IDT71V67603/Z IDT71V67803/Z Pipelined Outputs, Single Cycle Deselect Features ◆ 256K x 36, 512K x 18 memory configurations ◆ Supports high system speed: – 166MHz 3.5ns clock access time – 150MHz 3.8ns clock access time – 133MHz 4.2ns clock access time ◆ LBO input selects interleaved or linear burst mode ◆ Self-timed write cycle with global write control (GW), byte write enable (BWE), and byte writes (BWx) ◆ 3.3V core power supply ◆ Power down controlled by ZZ input ◆ 3.3V I/O supply (VDDQ) ◆ Packaged in a JEDEC Standard 100-pin thin plastic quad flatpack (TQFP), 119 ball grid array (BGA) and 165 fine pitch ball grid array (fBGA). Description The IDT71V67603/7803 are high-speed SRAMs organized as 256K x 36/512K x 18.
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