| Part number | IDT74SSTUBF32868A |
|---|---|
| Datasheet | IDT74SSTUBF32868A_IDT.pdf |
| File Size | 568.97 KB |
| Manufacturer | IDT |
| Description | 28-BIT CONFIGURABLE REGISTERED BUFFER |
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This 28-bit 1:2 configurable registered buffer is designed for 1.7V to 1.9V VDD operation. All inputs are patible with the JEDEC standard for SSTL_18, except the chip-select gate-enable (CSGEN), control (C), and reset (RESET) inputs, which are LVCMOS. All outputs are edge-controlled circuits optimized for unterminated DIMM loads, and meet SSTL_18 specifications, except the open-drain error (QERR) output.
| Part Number | Description |
|---|---|
| IDT74SSTUBF32865A | 28-BIT 1:2 REGISTERED BUFFER |
| IDT74SSTUBF32866B | 25-BIT CONFIGURABLE REGISTERED BUFFER |
| IDT74SSTUBF32869A | 14-BIT CONFIGURABLE REGISTERED BUFFER |
| IDT74SSTUB32866B | 1.8V CONFIGURABLE BUFFER |
| IDT74SSTUBH32865A | 28-BIT 1:2 REGISTERED BUFFER |
| IDT74SSTUBH32868A | 28-BIT CONFIGURABLE REGISTERED BUFFER |
| IDT74SSTU32864 | 1:1 AND 1:2 REGISTERED BUFFER |
| IDT74SSTU32864A | 1:1 AND 1:2 REGISTERED BUFFER |
| IDT74SSTU32865 | 28-BIT 1:2 REGISTERED BUFFER |
| IDT74SSTU32866B | 1.8V CONFIGURABLE BUFFER |
