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IDT74SSTUBF32869A - 14-BIT CONFIGURABLE REGISTERED BUFFER

Datasheet Summary

Description

The IDT74SSTUBF32869A is 14-bit 1:2 registered buffer with parity, designed for 1.7 V to 1.9 V VDD operation.

All clock and data inputs are compatible with the JEDEC standard for SSTL_18.

The control inputs are LVCMOS.

Features

  • 14-bit 1:2 registered buffer with parity check functionality.
  • Supports SSTL_18 JEDEC specification on data inputs and outputs.
  • 50% more dynamic driver strength than standard SSTU32864.
  • Supports LVCMOS switching levels on C1 and RESET inputs.
  • Low voltage operation: VDD = 1.7V to 1.9V.
  • Available in 150 BGA package.

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Datasheet Details

Part number IDT74SSTUBF32869A
Manufacturer IDT
File Size 393.47 KB
Description 14-BIT CONFIGURABLE REGISTERED BUFFER
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www.DataSheet4U.com DATASHEET 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 CONFIDENTIAL IDT74SSTUBF32869A Description The IDT74SSTUBF32869A is 14-bit 1:2 registered buffer with parity, designed for 1.7 V to 1.9 V VDD operation. All clock and data inputs are compatible with the JEDEC standard for SSTL_18. The control inputs are LVCMOS. All outputs are 1.8V CMOS drivers optimized to drive the DDR2 DIMM load. They provide 50% more dynamic driver strength than the standard SSTU32864 outputs. The IDT74SSTUBF32869A operates from a differential clock (CLK and CLK). Data are registered at the crossing of CLK going high, and CLK going low. The device supports low-power standby operation.
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