IDT74SSTUBF32869A Overview
The IDT74SSTUBF32869A is 14-bit 1:2 registered buffer with parity, designed for 1.7 V to 1.9 V VDD operation. All clock and data inputs are patible with the JEDEC standard for SSTL_18. The control inputs are LVCMOS.
| Part number | IDT74SSTUBF32869A |
|---|---|
| Datasheet | IDT74SSTUBF32869A_IDT.pdf |
| File Size | 393.47 KB |
| Manufacturer | IDT |
| Description | 14-BIT CONFIGURABLE REGISTERED BUFFER |
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The IDT74SSTUBF32869A is 14-bit 1:2 registered buffer with parity, designed for 1.7 V to 1.9 V VDD operation. All clock and data inputs are patible with the JEDEC standard for SSTL_18. The control inputs are LVCMOS.
| Part Number | Description |
|---|---|
| IDT74SSTUBF32865A | 28-BIT 1:2 REGISTERED BUFFER |
| IDT74SSTUBF32866B | 25-BIT CONFIGURABLE REGISTERED BUFFER |
| IDT74SSTUBF32868A | 28-BIT CONFIGURABLE REGISTERED BUFFER |
| IDT74SSTUB32866B | 1.8V CONFIGURABLE BUFFER |
| IDT74SSTUBH32865A | 28-BIT 1:2 REGISTERED BUFFER |
| IDT74SSTUBH32868A | 28-BIT CONFIGURABLE REGISTERED BUFFER |
| IDT74SSTU32864 | 1:1 AND 1:2 REGISTERED BUFFER |
| IDT74SSTU32864A | 1:1 AND 1:2 REGISTERED BUFFER |
| IDT74SSTU32865 | 28-BIT 1:2 REGISTERED BUFFER |
| IDT74SSTU32866B | 1.8V CONFIGURABLE BUFFER |