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IS43DR16640DL Datasheet 64mx16 Ddr2 Dram

Manufacturer: ISSI (now Infineon)

Overview: IS43/46DR81280D, IS43/46DR81280DL IS43/46DR16640D, IS43/46DR16640DL 128Mx8, 64Mx16 DDR2.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

ISSI's 1Gb DDR2 SDRAM uses a double-data-rate architecture to achieve high-speed operation.

The double-data rate architecture is essentially a 4n-prefetch architecture, with an interface designed to transfer two data words per clock cycle at the I/O balls.

ADDRESS TABLE Parameter 128M x 8 Configuration 16M x 8 x 8 banks Refresh Count 8K/64ms Row Addressing 16K (A0-A13) Column Addressing 1K (A0-A9) Bank Addressing BA0 - BA2 Precharge Addressing A10 64M x 16 8M x 16 x 8 banks 8K/64ms 8K (A0-A12) 1K (A0-A9) BA0 - BA2 A10 KEY TIMING PARAMETERS Speed Grade -18F -22E -25D tRCD 13.125 13.33 12.5 tRP 13.125 13.33 12.5 tRC 51.25 55 55 tRAS 40 40 40 tCK @CL=3 X 5 5 tCK @CL=4 3.75 3.75 3.75 tCK @CL=5 2.5 2.5 2.5 tCK @CL=6 2.2 2.2 2.5 tCK @CL=7 1.875 2.2 — Note: Faster speed options

Key Features

  • Standard Voltage: Vdd and Vddq = 1.8V ±0.1V.
  • Low Voltage (L): Vdd and Vddq = 1.5V ±0.075V.
  • SSTL_18-compatible for Standard Voltage.
  • SSTL_15-compatible for Low Voltage.
  • Double data rate interface: two data transfers per clock cycle.
  • Differential data strobe (DQS, DQS).
  • 4-bit prefetch architecture.
  • On chip DLL to align DQ and DQS transitions with CK.
  • 8 internal banks for concurrent operation.
  • Programmable CA.

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