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IS46DR81280D - 128Mx8 DDR2 DRAM

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General Description

ISSI's 1Gb DDR2 SDRAM uses a double-data-rate architecture to achieve high-speed operation.

The double-data rate architecture is essentially a 4n-prefetch architecture, with an interface designed to transfer two data words per clock cycle at the I/O balls.

Overview

IS43/46DR81280D, IS43/46DR81280DL IS43/46DR16640D, IS43/46DR16640DL 128Mx8, 64Mx16 DDR2.

Key Features

  • Standard Voltage: Vdd and Vddq = 1.8V ±0.1V.
  • Low Voltage (L): Vdd and Vddq = 1.5V ±0.075V.
  • SSTL_18-compatible for Standard Voltage.
  • SSTL_15-compatible for Low Voltage.
  • Double data rate interface: two data transfers per clock cycle.
  • Differential data strobe (DQS, DQS).
  • 4-bit prefetch architecture.
  • On chip DLL to align DQ and DQS transitions with CK.
  • 8 internal banks for concurrent operation.
  • Programmable CA.

More Datasheets from ISSI (now Infineon)

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