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IS65WV25616DBLL - ULTRA LOW POWER CMOS STATIC SRAM

Download the IS65WV25616DBLL datasheet PDF. This datasheet also covers the IS62WV25616DALL variant, as both devices belong to the same ultra low power cmos static sram family and are provided as variant models within a single manufacturer datasheet.

General Description

256K words by 16 bits.

Key Features

  • High-speed access time: 35, 45, 55 ns.
  • CMOS low power operation 30 mW (typical) operating 6 µW (typical) CMOS standby.
  • TTL compatible interface levels.
  • Single power supply 1.65V--2.2V Vdd (IS62WV25616DALL) 2.3V--3.6V Vdd (IS62/65WV25616DBLL).
  • Fully static operation: no clock or refresh required.
  • Three state outputs.
  • Data control for upper and lower bytes.
  • Industrial and Automotive temperature support.
  • Lead-free a.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IS62WV25616DALL-ISSI.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription for IS65WV25616DBLL (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for IS65WV25616DBLL. For precise diagrams, and layout, please refer to the original PDF.

IS62WV25616DALL/DBLL, IS65WV25616DBLL 256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM MARCH 2015 FEATURES • High-speed access time: 35, 45, 55 ns • CMOS low power...

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2015 FEATURES • High-speed access time: 35, 45, 55 ns • CMOS low power operation 30 mW (typical) operating 6 µW (typical) CMOS standby • TTL compatible interface levels • Single power supply 1.65V--2.2V Vdd (IS62WV25616DALL) 2.3V--3.6V Vdd (IS62/65WV25616DBLL) • Fully static operation: no clock or refresh required • Three state outputs • Data control for upper and lower bytes • Industrial and Automotive temperature support • Lead-free available • 2 CS option available DESCRIPTION The ISSI IS62WV25616DALL and IS62/65WV25616DBLL are high-speed, low power, 4M bit SRAMs organized as 256K words by 16 bits. It is fabricated usin

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