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CY8C4126AZA-S455 - Automotive PSoC 4100S Plus MCU

General Description

PSoC™ 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0+ CPU while being AEC-Q100 compliant.

It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing.

Key Features

  • Automotive Electronics Council (AEC) AEC-Q100 Qualified.
  • 32-bit MCU subsystem - 48-MHz Arm® Cortex®-M0+ CPU - Up to 128 KB of flash with Read Accelerator - Up to 16 KB of SRAM - 8-channel DMA engine.
  • Programmable analog - Two opamps with reconfigurable high-drive external and high-bandwidth internal drive and comparator modes and ADC input buffering capability. Opamps can operate in Deep Sleep low-power mode. - 12-bit 1-Msps SAR ADC with differential and single-ended.

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CY8C41xx Automotive PSoC™ 4: PSoC™ 4100S Plus Based on Arm® Cortex®-M0+ CPU General description PSoC™ 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0+ CPU while being AEC-Q100 compliant. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. PSoC™ 4100S Plus is a member of the PSoC™ 4 platform architecture. It is a combination of a microcontroller with standard communication and timing peripherals, a capacitive touch-sensing system (CAPSENSE™) with best-in-class performance, programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable connectivity.