Datasheet4U Logo Datasheet4U.com

S25FL128L - FL-L flash

General Description

The FL-L family devices are flash non-volatile memory products using: Floating gate technology

65-nm process lithography The FL-L family connects to a host system via a serial peripheral interface (SPI).

Key Features

  • a page programming buffer that allows up to 256-bytes to be programmed in one operation and provides individual 4KB sector, 32KB half block, 64KB block, or entire chip erase. By using FL-L family devices at the higher clock rates supported, with Quad commands, the instruction read transfer rate can match or exceed traditional parallel interface, asynchronous, NOR flash memories, while reducing signal count dramatically. The FL-L family products offer high densities coupled with the flexibility a.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
S25FL128L 3.0V FL-L Flash Memory Cypress
S25FL128K 128-Mbit CMOS 3.0 Volt Flash Memory SPANSION
S25FL128P 128-Mb 3.0 V Flash Memory Cypress Semiconductor
S25FL128P 128 Megabit CMOS 3.0 Volt Flash Memory SPANSION
S25FL128S 3.0V SPI Flash Memory Cypress

Other Datasheets by Infineon

Part Number Description
S25FL128S 128Mb (16MB) FL-S Flash
S25FL127S 128Mb (16MB) FL-S Flash
S25FL064L 64Mb (8MB) FL-L Flash Memory
S25FL256L FL-L flash
S25FL256S 256Mb (32MB) FL-S Flash

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
S25FL128L, S25FL256L 128 Mb (16 MB) / 256 Mb (32 MB) FL-L flash SPI multi-I/O, 3.0 V General description The FL-L family devices are flash non-volatile memory products using: • Floating gate technology • 65-nm process lithography The FL-L family connects to a host system via a serial peripheral interface (SPI). Traditional SPI single bit serial input and output (single I/O or SIO) is supported as well as optional two bit (dual I/O or DIO) and four bit wide Quad I/O (QIO) and quad peripheral interface (QPI) commands. In addition, there are double data rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock.