IC41SV4105 Datasheet | Integrated Circuit Solution

Document Title 1Mx4 bit Dynamic RAM with Fast Page Mode Revision History Revision No 0A History Initial Draft Draft Date October 29,2001 Remark Preliminary The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices. Integrated Circuit Solution Inc. DR032-0A 10/29/2001 Preliminary 1M x 4 (4- MBIT) DYNAMIC RAM WITH FAST PAGE MODE Features - Fast Page Mode Access Cycle - TTL patible inputs and outputs - Refresh Interval: -- 1,024 cycles/16 ms - Refresh Mode: RAS-Only, CAS-before-RAS (CBR), and Hidden - JEDEC standard pinout - Single power supply: 1.9V - 2.4V DESCRIPTION The ICSI 4105 Series is a 1,048,576 x 4-bit high-performance CMOS Dynamic Random Access Memory. The Fast Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 20 ns per 4-bit word. These Features make the 4105 Series ideally suited for digital signal processing, and low power portable audio applications. The 4105 Series is packaged in a 20-pin 300mil SOJ and a 20 pin TSOP-2 KEY TIMING PARAMETERS Parameter RAS Access Time (t RAC) CAS Access Time (t CAC) Column Address Access Time (t AA) Fast Page Mode Cycle Time (t PC) Read/Write Cycle Time (t RC) - 50 50 14 25 20 90...