IC42S16160 Datasheet | Integrated Circuit Solution

IC41C16100S IC41LV16100S Document Title 1M x 16 bits Dynamic RAM with EDO Page Mode Revision History Revision No 0A 0B 0C 0D History Initial Draft Revise for typographic Add Pb-free package Change t COH from 5ns to 4ns Draft Date June 5,2001 November 9,2001 May 06,2004 November 26,2004 Remark The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices. Integrated Circuit Solution Inc. DR010-0D 11/26/2004 IC41C16100S IC41LV16100S 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE Features - Extended Data-Out (EDO) Page Mode access cycle - TTL patible inputs and outputs; tristate I/O - Refresh Interval: Refresh Mode: 1,024 cycles /16 ms RAS-Only, CAS-before-RAS (CBR), and Hidden Self refresh Mode - 1,024 cycles / 128ms - JEDEC standard pinout - Single power supply: 5V ± 10% (IC41C16100S) 3.3V ± 10% (IC41LV16100S) - Byte Write and Byte Read operation via two CAS - Industrail Temperature Range -40°C to 85°C 16-bit high-performance CMOS Dynamic Random Access Memories. These devices offer an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 20 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes the IC41C16100S ideal for use in 16-, 32-bit wide data bus systems. These Features make the IC41C16100Sand IC41LV16100S ideally suited for high-bandwidth graphics, digital signal processing, high-performance puting systems, and peripheral applications. The IC41C16100S and IC41LV16100S are packaged in a 42-pin 400mil SOJ and 400mil 50- (44-) pin TSOP-2. -50 50 13 25 20 84 -60 60 15 30 25 104 Unit ns ns ns ns ns DESCRIPTION The ICSI IC41C16100S and IC41LV16100S are 1,048,576 x KEY TIMING PARAMETERS Parameter...