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IC43R16800 Datasheet 2m X 16bit X 4 Banks Ddr Sdram

Manufacturer: Integrated Circuit Solution

Overview: IC43R16800 Document Title 2M x 16 Bit x 4 Banks (128-MBIT) DDR SDRAM Revision History Revision No 0A 0B History Initial Draft Mass production Draft Date January 20,2004 November 10,2004 Remark The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices. Integrated Circuit Solution Inc. DDR002-0B 11/10/2004 1 IC43R16800 2M Words x 16 Bits x 4 Banks (128-MBIT) DDR SYNCHRONOUS DYNAMIC RAM 5 Clock Cycle Time (tCK2) Clock Cycle Time (tCK2.5) Clock Cycle Time (tCK3) System Frequency (fCK max) DDR400 7.5ns 6ns 5ns 200MHz 6 DDR333 7.5ns 6ns 166MHz 7 DDR266 7.5ns 7ns 143MHz ■ High speed data transfer rates with system frequency up to 200 MHz ■ Data Mask for Write Control ■ Four Banks controlled by BA0 & BA1 ■ Programmable CAS Latency: 2, 2.

Key Features

  • The ICSI IC43R16800 is a four bank DDR DRAM organized as 2 banks x 4Mbit x 16. The IC43R16800 achieves high speed data transfer rates by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to a system clock. All of the control, address, circuits are synchronized with the positive edge of an externally supplied clock. I/O transactions are ocurring on both edges of DQS. Operating the four memory banks in an interleaved fashion allows random access ope.

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