Datasheet4U Logo Datasheet4U.com

ICS83840 - DDR SDRAM MUX

Description

The ICS83840 is a DDR SDRAM MUX and is a member of the HiPerClock S™ family of High HiPerClockS™ Performance Clock Solutions from ICS.

The device has 10 Host Lines and each host line can be passed to 4 Data Ports.

Features

  • 40 low skew single-ended DIMM ports.
  • 4 SSTL-2 compatible enable inputs.
  • Maximum Switching Speed: 3ns.
  • Output skew: 120ps (maximum).
  • Bank skew: 45ps (maximum).
  • ron = 8Ω (typical).
  • Full 2.5V supply modes.
  • 0°C to 70°C ambient operating temperature.
  • Pin compatible with the CBTV4010.

📥 Download Datasheet

Datasheet preview – ICS83840

Datasheet Details

Part number ICS83840
Manufacturer Integrated Circuit Systems
File Size 174.47 KB
Description DDR SDRAM MUX
Datasheet download datasheet ICS83840 Datasheet
Additional preview pages of the ICS83840 datasheet.

📁 Similar Datasheet

  • ICS83023 - DUAL 1-TO-1 DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER (Integrated Circuit Solution)
  • ICS83023I - 1-TO-1 DIFFERENTIAL-TOLVCMOS TRANSLATOR/BUFFER (Integrated Device Technology)
  • ICS83026I-01 - 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER (Integrated Device Technology)
  • ICS8304 - LOW SKEW / 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER (Integrated Circuit Solution)
  • ICS8305 - LVCMOS-to-LVCMOS/LVTTL Fanout Buffer (Renesas)
  • ICS83056I-01 - SINGLE-ENDED LVCMOS MULTIPLEXER (Renesas)
  • ICS8305I - LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER (Renesas)
  • ICS8305I - MULTIPLEXED DIFFERENTIAL/LVCMOS-TO-LVCMOS/LVTTL FANOUT BUFFER (Integrated Device Technology)
  • ICS8305I-02 - LVCMOS-to-LVCMOS Fanout Buffer (Renesas)
  • ICS8308I - 1-TO-8 DIFFERENTIAL/LVCMOS-TO-LVCMOS FANOUT BUFFER (Integrated Device Technology)
Other Datasheets by Integrated Circuit Systems
  • ICS83840B - DDR SDRAM MUX
  • ICS83841 - DDR SDRAM 2:1 MUX
  • ICS8302 - LOW SKEW 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER
  • ICS8302-01 - 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT
  • ICS83021I - DIFFERENTIAL-TO-LVCMOS/LVTTL TRANSLATOR
  • ICS83023I - DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER
  • ICS83026I - 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER
  • ICS83026I-01 - 1-TO-2 DIFFERENTIAL-TO-LVCMOS/LVTTL FANOUT BUFFER

Full PDF Text Transcription

Click to expand full text
Integrated Circuit Systems, Inc. ICS83840 DDR SDRAM MUX FEATURES • 40 low skew single-ended DIMM ports • 4 SSTL-2 compatible enable inputs • Maximum Switching Speed: 3ns • Output skew: 120ps (maximum) • Bank skew: 45ps (maximum) • ron = 8Ω (typical) • Full 2.5V supply modes • 0°C to 70°C ambient operating temperature • Pin compatible with the CBTV4010 GENERAL DESCRIPTION The ICS83840 is a DDR SDRAM MUX and is a member of the HiPerClock S™ family of High HiPerClockS™ Performance Clock Solutions from ICS. The device has 10 Host Lines and each host line can be passed to 4 Data Ports. The 10 channels are allocated as follows in the DDR SDRAM application: 8 data lines, 1 strobe line and 1 DQm line. The Host/Data Ports are compatible with single-ended SSTL-2 and the device operates from a 2.
Published: |