ICS83841 Datasheet | Integrated Circuit Systems

Integrated Circuit Systems, Inc. 20 BIT, DDR SDRAM 2:1 MUX Features - Forty low skew single-ended DIMM ports - One SSTL-2 patible select input - Maximum Switching Speed: 3ns - Output skew: 180ps (maximum) - ron = 20Ω (typical) - Full 2.5V supply modes - 0°C to 70°C ambient operating temperature - Available in both standard and lead-free Ro HS pliant packages GENERAL DESCRIPTION The ICS83841 is a 20 Bit, DDR SDRAM 2:1 MUX and is a member of the Hi Per Clock S™ family of Hi Per Clock S™ High Performance Clock Solutions from ICS. The device has 20 host lines and each host line can be passed to 2 data ports. The host/data ports are patible with single-ended SSTL-2 and the device operates from a 2.5V supply. IC S Guaranteed low output skew makes the ICS83841 ideal for .. demanding applications which require well defined performance and repeatability. SIMPLIFIED SCHEMATIC LOGIC DIAGRAM DH0 ron Sw Sw DA0 DB0 DHx DAx or DBx DH19 ron Sw Sw DA19 DB19 PIN ASSIGNMENT 1 A B C D E F G H J K DB17 DA18 DB18 DA19 DB19 DA0 DB0 DA1 DB1 DA2 DA17 DH17 DH18 GND DH19 DH0 GND DH1 DH2 DB2 DB16 DH16 DB15 DA16 DA15 DH15...