Description
The ICS85408 is a low skew, high performance 1-to-8 Differential-to-LVDS Clock Distribution HiPerClockS™ Chip and a member of the HiPerClock S ™ family of High Performance Clock Solutions from ICS.
Features
- 8 Differential LVDS outputs.
- CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL.
- Maximum output frequency: 700MHz.
- Translates any differential input signal (LVPECL, LVHSTL, SSTL, HCSL) to LVDS levels without external bias networks.
- Translates any single-ended input signal to LVDS with resistor bias on nCLK input.
- Multiple output enable inputs for disabling unused outputs in reduced fanout appl.