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ICS9250YG-38-T - Frequency Generator with 200MHz Differential CPU Clocks

Description

Cr ystal input,nominally 14.318MHz, with internal loading cap.

Cr ystal output, nominally 14.318MHz, with internal loading cap.

Features

  • X1 2 55 FS1.
  • 3 Differential CPU Clock Pairs @ 3.3V X2 3 54 FS0 GND 4 53 CPU_STOP#.
  • 7 PCI (3.3V) @ 33.3MHz PCICLK_F0 5 52 CPUCLKT0 PCICLK_F1 6 51 CPUCLKC0.
  • 3 PCI_F (3.3V) @ 33.3MHz PCICLK_F2 7 50 VDDCPU VDDPCI 8 49 CPUCLKT1.
  • 1 USB (3.3V) @ 48MHz GND 9 48 CPUCLKC1 PCICLK0 10 47 GND.
  • 1 DOT (3.3V) @ 48MHz PCICLK1 11 46 VDDCPU PCICLK2 12 45 CPUCLKT2.
  • 1 REF (3.3V) @ 14.318MHz PCICLK3 13 44 CPUCLKC2.
  • 1 3V66 (3.3V) @ 66.6MHz VDDPCI 14.

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Datasheet preview – ICS9250YG-38-T

Datasheet Details

Part number ICS9250YG-38-T
Manufacturer Integrated Circuit Systems
File Size 136.18 KB
Description Frequency Generator with 200MHz Differential CPU Clocks
Datasheet download datasheet ICS9250YG-38-T Datasheet
Additional preview pages of the ICS9250YG-38-T datasheet.

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Full PDF Text Transcription

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Integrated Circuit Systems, Inc. ICS9250-38 Frequency Generator with 200MHz Differential CPU Clocks Recommended Application: CK 408 clock for Almador-M mobile chipset with Tualatin Pin Configuration PIII processor. VDDREF 1 56 REF Output Features: X1 2 55 FS1 • 3 Differential CPU Clock Pairs @ 3.3V X2 3 54 FS0 GND 4 53 CPU_STOP#* • 7 PCI (3.3V) @ 33.3MHz PCICLK_F0 5 52 CPUCLKT0 PCICLK_F1 6 51 CPUCLKC0 • 3 PCI_F (3.3V) @ 33.3MHz PCICLK_F2 7 50 VDDCPU VDDPCI 8 49 CPUCLKT1 • 1 USB (3.3V) @ 48MHz GND 9 48 CPUCLKC1 PCICLK0 10 47 GND • 1 DOT (3.3V) @ 48MHz PCICLK1 11 46 VDDCPU PCICLK2 12 45 CPUCLKT2 • 1 REF (3.3V) @ 14.318MHz PCICLK3 13 44 CPUCLKC2 • 1 3V66 (3.3V) @ 66.6MHz VDDPCI 14 43 MULTSEL0* GND 15 42 I REF • 1 VCH/3V66 (3.3V) @ 48MHz or 66.
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