Datasheet4U Logo Datasheet4U.com

M1040 - VCSO BASED CLOCK PLL WITH AUTOSWITCH

Download the M1040 datasheet PDF. This datasheet also covers the M10 variant, as both devices belong to the same vcso based clock pll with autoswitch family and are provided as variant models within a single manufacturer datasheet.

General Description

The M1040 is a VCSO (Voltage Controlled SAW Oscillator) based clock generator PLL designed for clock protection, frequency translation and jitter attenuation in OC-12/48 class optical networking systems.

Key Features

  • dual differential inputs with two modes of input selection: manual and automatic upon clock failure. The clock multiplication ratios and output divider ratio are pin selectable. This device provides two outputs. External loop components allow the tailoring of PLL loop response.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (M10-40.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number M1040
Manufacturer Integrated Circuit Systems
File Size 436.58 KB
Description VCSO BASED CLOCK PLL WITH AUTOSWITCH
Datasheet download datasheet M1040 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Integrated Circuit Systems, Inc. Preliminary Information M1040 VCSO BASED CLOCK PLL WITH AUTOSWITCH PIN ASSIGNMENT (9 x 9 mm SMT) MR_SEL2 GND AUTO DIF_REF0 nDIF_REF0 REF_SEL DIF_REF1 nDIF_REF1 VCC MR_SEL1 MR_SEL0 REF_ACK LOL NBW VCC DNC DNC DNC 27 26 25 24 23 22 21 20 19 GENERAL DESCRIPTION The M1040 is a VCSO (Voltage Controlled SAW Oscillator) based clock generator PLL designed for clock protection, frequency translation and jitter attenuation in OC-12/48 class optical networking systems. It features dual differential inputs with two modes of input selection: manual and automatic upon clock failure. The clock multiplication ratios and output divider ratio are pin selectable. This device provides two outputs. External loop components allow the tailoring of PLL loop response.